Control apparatus for an environmental data system

ABSTRACT

Control apparatus for an environmental data system of the type which continuously records the output of one or more field located environmental sensors, and which also counts and compares the output with a threshold magnitude. When the threshold magnitude is exceeded, an alarm signal is generated which establishes a communication link with a remote central control station. The control apparatus provides a single complete pulse from a clock at a first output terminal when the communication link is established, to transfer the count to a shift register, and subsequent pulses from the clock are provided at a second output terminal, to clock the data from the shift register.

Unite States Patent [191 Melvin, Jr.

[ June 19, 1973 I CONTROL APPARATUS FOR AN ENVIRONMENTAL DATA SYSTEM [75lnventor: Waymon A. Melvin, Jr., Erwin, NC.

[73] Assignee: Westinghouse Electric Corporation,

Pittsburgh, Pa.

[22] Filed: June 1, 1971 [21] Appl. No.: 148,477

SENSOR SENSOR SIGNAL CONDITIONER SIGNAL TIONER ISOLATING RELAY ISOLATINGRELAY COUNTER COUNTER SHIFT REGISTER Primary Examiner-Harold PittsAtt0rneyA. T. Stratton and Donald R Lackey [57] ABSTRACT Controlapparatus for an environmental data system of the type whichcontinuously records the output of one or more field locatedenvironmental sensors, and which also counts and compares the outputwith a threshold magnitude. When the threshold magnitude is exceeded, analarm signal is generated which establishes a communication link with aremote central control station. The control apparatus provides a singlecomplete pulse from a clock at a first output terminal when thecommunication link is established, to transfer the count to a shiftregister, and subsequent pulses from the clock are provided at a secondoutput terminal, to clock the data from the shift register.

5 Claims, 4 Drawing Figures INTERVAL RECORDER ALARM CONTROL APPARATUSFOR AN ENVIRONMENTAL DATA SYSTEM CROSS REFERENCE TO RELATED APPLICATIONCertain of the apparatus disclosed but not claimed herein, is claimed inco-pending application Ser. No. 148,478, filed June I, l97l whichapplication is assigned to the same assignee as the present application.

BACKGROUND OF THE INVENTION 1. Field of The Invention The inventionrelates in general to environmental data systems, and more specificallyto control apparatus for systems of the type which monitor and recordenvironmental variables, and alert a remote central control station whena variable exceeds a predetermined threshold value over a predeterminedtime interval.

2. Description of The Prior Art It is becoming increasingly moreimportant to continuously monitor certain environmental variables, andto make decisions based on air or water quality. Continuous monitoringis necessary in order to determine if controls should be imposed inorder to regulate the pollution level, the degree of control required,and whether the degree of control is sound and being maintained.

Environmental control systems of the prior arthave been of manydifferent types. For example, visual and recorded readings have beenmanually converted to punched cards, which are analyzed with the aid ofa computer. Other systems log instantaneous sensor readings atpredetermined time intervals, punching the readings directly on papertape. The punched tape is used to convert the data to punched cards forcomputer use. Magnetic tape has been used to record data along with asuitable time pulse, with the magnetic tape being collected periodicallyand translated to computer input information. On-line or real timecomputers have been used which continuously collect environmental datafrom sensors and issue an alarm when a pollutant level is too high.Centralized data aquisition systems have been used which sample sensorsby scanning a number of sensors in a predetermined sequence.

All of these prior art systems have disadvantages in certainapplications. Manually punching cards from visual and recordedmeasurements is slow, and the amount of data collected is relativelysmall, resulting in inaccuracies. The punching on tape of instantaneoussensor readings is also inaccurate, unless the time period betweenreadings is very short, and the punched paper tape apparatus requires asubstantial amount of maintenance. The magnetic tape methods provideaccurate data which may be interpreted quickly once the magnetic tape istranslated into computer input language, but it provides no means foralerting a central control station at the time a safe pollution level isexceeded. On-line computers are costly, and restrictive in the locationand number of field locations and sensors. Real time systems whichoperate by scanning sensors, require a data channel for each sensor tothe control center scanner, and are thus costly, and also inaccurateunless the scanning rate is very high.

Thus, it would be desirable to provide a new and improved controlapparatus for environmental data systems of the type which continuouslymonitor environmental sensors, record the readings for later computeraided analysis,-and which are also capable of alerting a remotelylocated central control station on a real time basis when a pollutantlevel exceeds a predetermined magnitude. The control apparatus should beuncomplicated and reliable, and should output complete control pulsesregardless of when the control is activated.

SUMMARY OF THE INVENTION Briefly, the present invention is a new andimproved control apparatus for environmental data systems of the typewhich continuously record digital signals responsive to the sensedvariables, on separate channels of magnetic tape, along with a timechannel on the tape which enables the recorded data to be related totime.

The digital output associated with each sensor is also applied to acounter which starts the count for its associated sensor with a timingpulse fromthe recording means. The accumulated count at the time thenext timing pulse is received is transferred to a memory register forstorage means, and the counter is reset to start counting the pulsesreceived during the next time interval.

The count for each sensor is compared with a predetermined thresholdvalue, either on the output of the counters, or on the output of thestorage means. If none of the counts associated with the sensors exceedtheir preset thresholds, the storage means may release its count, or itmay retain the count until the next timing pulse, at which time it maybe reset, or simply be written over by the new count.

If the threshold of any sensor is exceeded, an alarm signal is generatedwhich activates or establishes a communication link from the fieldlocation of the sensors to a remotely located central control station.When the communication link is established, the control apparatus of theinvention is activated, and it provides a single complete clock pulse ata first output terminal, which initiates the transfer of the count fromthe storage means to a parallel to serial converter, or shift register.Subsequent clock pulses are provided at a second output terminal whichclock the data from the shift register.

BRIEF DESCRIPTION OF THE DRAWINGS The invention may be betterunderstood, and further advantages and uses thereof more readilyapparent, when considered in view of the following detailed descriptionof exemplary embodiments, taken with the accompanying drawings, inwhich:

FIG. 1 is a block diagram illustrating an environmental monitoring andalerting system of the type which may be used with control apparatusconstructed according to the teachings of the invention;

FIG. 2 is a logic diagram of control apparatus constructed according tothe teachings of the invention;

FIG. 3 is a graph which aids in the understanding of the controlapparatus shown in FIG. 2; and

FIG. 4 is a logic diagram of alarm storage apparatus which may be usedto preclude the possibility of losing an alarm signal during monitoring.

DESCRIPTION OF PREFERRED EMBODIMENTS Referring now to the drawings, andFIG. 1 in particu' lar, there is illustrated an environmental datasystem I0 of the type which may be controlled by control apparatusconstructed and arranged according to the teachings of the invention.Environmental data system 10 includes a plurality of sensors, such assensors l2, l4 and 16, which are disposed at a field location. Typicalenvironmental sensors are those for measuring pollutants, such asparticulates, nitrous oxides and sulphur dioxide in air, and waterpollutants, as well as those for measuring rainfall, wind direction andvelocity, sun light, humidity, barometric pressure, solar radiation,water temperature, soil temperature, and the like.

Typical sensors output a continuous electrical signal, voltage orcurrent, proportional to the variable being sensed, and if they are ofthis type an electronic integrator with a three-wire pulse initiator,referred to generally as a signal conditioner, would be required tochange the continuous signal to a pulse rate. Thus, as illustrated inFIG. 1, signal conditioners 18, and 22 are connected to the outputs ofsensors l2, l4 and 16, respectively. If a parameter sensor outputs athree-wire contact closure, a signal conditioner for that sensor wouldnot be required.

Two isolated pulse outputs are required for each of the sensors 12, 14and 16, which may be provided by isolating relays 24, 26 and28,respectively. As illustrated relative to isolating relay 24, therelay may include first and second electromagnetic coils 30 and 32,respectively, with coil 30 having contacts 34 and 36 associatedtherewith, and coil 32 having contacts 38 and 40 associated therewith.Contacts 34 and 38 are interconnected to provide a first three wireoutput, and contacts 36 and 40 are interconnected to provide a secondthree wire output.

The first three wire outputs of the isolating relays are all connectedto recording means 42. Recording means 42 is preferably a magnetic taperecorder 42 having a plurality of channels, depending upon how manysensors it is to serve, with one. of the channels being for time pulseinformation, which is provided by the recorder and recorded on themagnetic tape in order to relate the data pulses recorded on'each of theother channels to time. Typical time intervals are 15, 30 or 60 minutes.Available recorders, such as the recorder disclosed in US. Pat. No.3,059,239, which is assigned to the same assignee as the presentapplication, conventionally use a plug-in type cartridge which holds asupply of magnetic tape sufficient for a relatively long period of time,such as 36 days. Since each data pulse is proportional to a measuredquantity, the data pulses can be totalized for each time interval andthe average quantity measured per time interval determined. The fieldtape is collected periodically, such as every 30 days, and taken to acentral control station for translation to computer input compatibility.The translator converts the time and data pulses to computer orientedlanguage on punched cards, or magnetic computer tape. A programmabletape-to-tape translation system which may be used is disclosedin'co-pending application Scr. No. l43,428, filed May 14, 1971.

While the field tape presents accurate information which may beanalyzed, and used to base decisions relative to environmentalpollution, such as whether or not controls are nccessary, the degree ofcontrol, and the effectiveness of a control, it provides no means foralerting the central control center on a real time basis when safepollution levels are exceeded. Further, the recorder 42 may not beremotely monitored from the control center in order to determine if thesensors are operating properly, or to determine the latest sensorreadings.

These features are provided by connecting the second three wire outputof each isolating relay to binary counters, or binary coded decimalcounters, as desired. Thus, the second output of isolating relay 24 isconnected to counter register 44, the second output of isolating relay26 is connected to counter 46, and the second output of isolating relay28 is connected to counter Counters 44, 46 and 48 are connected tostorage means to enable the counters to be reset at the end of a timinginterval, while retaining their accumulated counts in the storage means.The storage means may be a memory register, which, upon command, assumesthe state of all of the flip-flops in the counters, or, as illustrated,it may be a group of latches which assume and follow the count of theirassociated binary counters when the latch lines are driven high, andwhich holds the count therein at the time their latch lines are driven"low". The counters and latches may be conventional,

such as Texas Instrument types SN7493N and SN7475N, respectively. Asillustrated, latch 50 is connected to store the count of counter 44 whenits latch line 52 is driven low, latch 54 stores the count of counter 46when its latchiline 56 is driven low, and latch 58 stores the count ofcounter 48 when its latch line 60 is driven low.

The latch lines 52, 56 and 60 may be driven high to allow the latches toassume the counts of their associated counters, and then low to hold thecount, as well as resetting the counters at the proper times, by usingthe interval or timing pulses produced by the recorder 42. Asillustrated, an interval converter 62 which provides the desired logiclevel outputs, may be connected to obtain the timing pulses of therecorder 42 and provide the required logic levels for resetting andsetting the latches, and resetting the counter. Output terminal 64 ofinterval converter 62 is connected to the latch lines 52, 56 and 60 viaan inverter 65, driving the latch lines high to enable them to reset andpick up the accumulated counts of their associated counters, and thenlow to hold their newly acquired counts, with a single interval pulse.Output terminal 64 is also connected to a one shot reset multivibrator66, whose output is delayed for a sufficient period of time to assurethat the latches 50, 54 and 58 are set. The output of the one shot 66 isconnected to counters 44, 46 and 48, resetting them to zero in responseto a timing pulse, to enable them to start counting the pulses occurringduring the next interval of time. The latch lines are thus held low,until an interval pulse is received, with the latches being reset topick up the latest interval counts, and immediately set to hold the newcounts, with a single interval pulse. I I

When one of the counters accumulates a pulse count during a timinginterval which reaches a preset thresh old for its associated sensor, analarm condition exists which is stored in first alarm storage meansuntil the end of the interval, at which time the alarm condition isautomatically communicated to the central control station. Thiscomparison of the counts with predeter mined threshold values may beperformed at the outputs of the counters as illustrated, or, at theoutputs of the-latches, depending upon the type of comparison meansused.

The threshold magnitudes for each sensor are set by comparators 68, 70and 72 associated with the output of counters 44, 46 and 50,respectively. Each comparator includes adjustable selectors, such asselectors 74, 76, 78 and 80 associated with comparator 68. Eachcomparator also includes a gate associated with each adjustableselector, such as gates 82, 84, 86 and 88, associated with adjustableselectors 74, 76, 78 and 80, respectively, and a gate 90 responsive tothe outputs of gates 82, 84, 86 and 88. Gate 90 outputs a signal whenthe preset count of its comparator is reached.

If none of the comparators output an alarm signal during a timeinterval, the counters are reset by the interval pulse and thecomparators automatically monitor the counters during the next timeinterval.

When one of the counters 44, 46, or 48 reaches the threshold countpreset on its associated comparator during a time interval, this alarmcondition is not used to immediately initiate a communication with thecentral control station. The fact that an alarm condition exists, andthe identification of the associated sensor, is stored in first alarmstorage means 79 until the end of the time interval. This featureenables the full count for the time interval to be accumulated by thecounters and transferred to the latches, and it thus gives the othercomparators the opportunity to determine if their associated counterswill reach their preset thresholds during thetime interval.

This storage of an alarm signal or signals, until an interval pulse isreceived and is performed by the first alarm storage circuit 79, and itincludes a flip-flop and an AND gate for each comparator.

More specifically, the first alarm storage means 79 includes flip-flops67, 69 and 71, and AND gates 73, 75, and 77, with the set inputs offlip-flops 67, 69 and 71 being connected to the outputs of comparators68, 70 and 72, respectively. The set outputs of flip-flops 67, 69 and 71are connected to an input of AND gates 73, 75 and 77, respectively. Theother input of each AND gate is connected to enable its associated gateupon receipt of a time interval pulse. Thus, as illustrated, each of theAND gates 73, 75, and 77 may be connected to the output of inverter 65,to receive the same signal used by the latches to pick up and hold thelatest counts of their counters at an interval pulse. If one of thecomparators initiates an alarm signal and sets it associated flip-flopin the first alarm storage means 79, this alarm signal is appliedthrough its gate upon receiving an interval pulse, to an OR gate 92. Theoutput of OR gate 92 is used to activate a communication link from thefield location of the sensors to the remotely located central controlstation. While this communication link may be power line carrier,microwave, radio, or any other suitable communication means, it ispreferably a conventional telephone network, and for purposes of exampleit will be so described.

The alarm signal from the gate 92 is applied to second alarm storagemeans 93, which functions to store the alarm signal only when thecommunication link is activate, i.e., already being monitored by thecentral control station. When the communication link is inactive, thesecond alarm storage means passes the output of OR gate 92 to anautomatic calling unit 94, such as Western Electric type 80l-A, whichsignals Modern 96, such as a Western Electric type 103 data set, toestablish a phone connection from Modern 96 at the field location toModem 98 located at the central control station. Modem 98 is connectedto a data controller 100, which controls a station alarm 102, and outputdevices 104, such as a magnetic tape recorder, paper tape punch machine,or the like.

When Modern 96 secures a phone line in response to a signal fromautomatic calling unit 94, and is ready to transmit data to Modern 98,Modern 96 provides a ready to send signal to input terminal 106 of acontrol circuit 108. Control circuit 108 includes a clock 110 forproviding a train of pulses at its input terminal 111, a first outputterminal 112 for outputting the first full clock pulse following theapplication of a ready" signal to input terminal 106, and a secondoutput terminal 114 for outputting the subsequent clock pulses for theduration of the ready signal provided by Modern 96.

The outputs of the latches 50, 54 and 58 are connected to gates 116, andthe outputs of the gates 116 are connected to a parallel to serialconverter, or shift register 118. The first output terminal 112 ofcontrol 108 is connected to gates 116, with the appearance of a clockpulse at terminal 112 loading the count from the latches 50, 54 and 58into the shift register 118 via the gates 116. The second outputterminal 114 of control circuit 108 is connected to shift register 118,with the clock pulses following the clock pulses applied to gates 116clocking out the data from the shift register 118.

The output data is identified as to field location by stationidentification means 127, which is adjusted to load the location codeinto gates 116 when the gates 116 are enabled, the individual sensorsare identified in like manner by sensor identification means 129, 133and 137, and the sensor initiating an alarm is identified by alarmidentification means 131, 135 and 139, which are set to alarm conditionby the outputs of flip-flops 67, 69 and 71, respectively, of the firstalarm storage means 79. A parity generator 121 is connected to theoutput of shift register 118, and the output of parity generator 121 isconnected to the input of Modern 96. Afterthe count associated with allof the sensors is clocked out, an end of transmission code is providedby means 141, which terminates the communication link.

In addition to alerting the remote central control station on a realtime basis when an alarm condition exists, and transmitting the sensordata to the remote central control station, the communication link maybe established at either end of the link, as indicated by phones 97 and99. For example, the central control station may initiate thecommunication link by dialing the code number of the desired remotestation. The Modern 96, in this instance, would signal control 108 toinitiate the signal for loading the information in the latches into theshift register 118 via the gates 116, and also to clock out the datafrom the shift register. This permits the sensors to be monitored, tocheck whether or not they are operating properly, and also enables thecentral control station to obtain the latest sensor readings uponcommand at any time.

A control circuit 108 constructed according to the teachings of theinvention, which may be used to provide the necessary signals forcontrolling the loading of data into the shift register 118, and theclocking out of the data from the shift register 118, is shown in FIG.2.

More specifically, control circuit 108 includes first and secondflip-flops and 132, first, second, third and fourth NAND gates 134, 136,138 and 140, respectively, and first, second, third and fourth inverters142, 144, 146 and 148, respectively.

Input terminal 106, which receives signals from Modern 96, is connectedto the reset terminals of the first and second flip-flops 130 and 132,and to an input of the first NAND gate 134. Input terminal 11 1, whichreceives clock pulses from clock 110, is connected to an input of thesecond NAND gate 136 and to the input of inverter 142. The first outputterminal 112 is connected to the output of inverter 148, and the secondoutput terminal 114 is connected to the output of the fourth NAND gate140.

The output of inverter 142 is connected to the remaining input of NANDgate 134, and the output of NAND gate 134 is connected to the set inputof the first flip-flop 130. The set output of flip-flop 130 is connectedto the remaining input of the second NAND gate 136. The output of thesecond NAND gate 136 is connected to inverter 144, and the output ofinverter 144 is connected to an input of the third NAND gate 138, and toan input of the fourth NAND gate 140. The set output Q of the secondflip-flop 132 is connected to the other input of the fourth NAND gate140, and the reset output6of the second flip-flop 132 is connected tothe remaining input of the third NAND gate 138. The output of the thirdNAND gate 138 is connected to inverter 146, and the output of inverter146 is connected to inverter 148 and to the toggle terminal T of thesecond flip-flop 132.

Means including the first NAND gate 134 and the first flip-flop 130start the circuit operation of the first full clock pulse following theapplication of a circuit start signal to input terminal 106. A zerologic level at input terminal 106 resets flip-flops 130 and 132 andclamps them. The logic levels for this circuit condition are indicatedin FIG. 2. When the Modern 96 establishes a communication link betweenthe field location and remote central control station, it applies alogic one" to input terminal 106, which removes the clamp on theflip-flops and applies a logic one to an input of the first NAND gate134. If the input terminal 106 goes high during a clock pulse from clock110, gate 134 is blocked by the logic zero applied to NAND gate 134 byinverter 142. This prevents starting the circuit on a sliver or portionofa clock pulse. The first clock zero following the application of asignal to input terminal 106, appears at the input of first NAND gate134 as a logic one, and NAND gate 134 therefore changes its output to alogic zero, toggling flip-flop 130 and applying a logic one to thesecond NAND gate 136. NAND gate 136 thus changes its output to a zeroupon receiving the first full clock pulse following a circuit startsignal at its input terminal 106..

Meansincluding the second and third NAND gate and the second flip-flopdirect the first full clock pulse to the first output terminal 112.

More specifically, the zero input to inverter 144 applies a logic one tothe third NAND gate 138 and to the fourth NAND gate 140. The fourth NANDgate remains blocked, however, due to the logic zero applied to itsother input by the second flip-flop 132. The third NAND gate 138,however, changes its output to a logic zero, which is inverted byinverters 146 and 148, to change the signal at output terminal 112 froma logic one to a logic zero. This change in the logic level of outputterminal 112, representing the first full clock pulse following thecircuit start signal applied to input terminal 106, is applied to thegates 116 shown in FIG. 1, initiating the loading of the latchinformation into the shift register 118, via the gates 116.

The logic one output of inverter 146 is also applied to the toggleterminal T of the second flip-flop 132, and when it changes back to alogic zero level at the end of the first clock pulse, flip-flop 132 istoggled, blocking the third NAND gate from passing any further clockpulses, and enabling the fourth NAND gate to apply all subsequent clockpulses to output terminal 114 via the second NAND gate 136, which hasbeen enabled by the first flip-flop 130, and inverter 144. The clockpulses appearing at output terminal 114 are applied to shift register118, in order to clock out the information stored therein. When all ofthe data has been clocked out of the shift register 118, the end oftransmission code directs Modem 96 to terminate its ready signal, andinput terminal 106 receives a logic zero which resets and clampsflip-flops 130 and 132.

FIG. 3 is a graph which aids in understanding the operation of thecontrol circuit 108 shown in FIG. 2. Graph 160 illustrates a train 162of clock pulses from clock 110, and also the logic levels of inputterminal 106, the set output of the first flip-flop 130, output terminal112, the set output of the second flip-flop 132, and output terminal114. For purposes of example, it will be assumed that the change 164 inlogic level of input terminal 106, signaling that circuit 108 shouldstart its operation, occurs during clock pulse 166. The first flip-flop130, however, waits for the first clock zero 168 to occur, and it thenchanges its set output as illustrated at 170. The first full clock pulse172 following the change 164 in logic level of input terminal 106,changes the logic level of input terminal 112, as indicated at 174, withthe change lasting only for the duration of clock pulse 172. Change 174enables gates 116 to load the information stored in the latches into theshift register 118. As illustrated, subsequent clock pulses are blockedfrom output terminal 112. Flip-flop 132 changes state at 176, coincidingwith the termination of the first full clock pulse 172, enabling thefourth NAND gate 140 to pass all subsequent clock pulses, starting withclock pulse 178, to the second output terminal 114. The first clockresponsive pulse appearing at output terminal 114 is referenced 180.

When the logic level of input terminal 106 changes at 182, following anend of transmission signal, flipflops 130 and 132 are reset as indicatedat 184 and 186, respectively, blocking subsequent clock pulses fromaffecting output terminals 112 and 114.

Second alarm storage means 93 which may be used to store an alarm signalfrom OR gate 92 in the event the field location is being monitored bythe central control station at the time of an interval pulse, is shownin FIG. 4. I

More specifically, the second alarm storage means 93 includes an inputterminal 188 connected to the output of OR gate 92, an output terminal190 connected to the input of the automatic calling unit 94, an inputterminal 192 connected to be responsive to whether or not the fieldlocation is being monitored, such as to terminal 106 of control 108,anda reset terminal 194 which is used to reset the second alarm storagemeans 93 after it has been set to store an alarm signal, and the storedsignal has been subsequently communicated to the automatic calling unitand a communication link is established in response to the alarm signal.

Alarm storage means 93 also includes first, second and third AND gates194, 196 and 198, respectively, a flip-flop 200, an inverter 202, and anOR gate 204. The first AND gate 194 has one of its inputs connected toinput terminal 188, the other input is connected to input terminal 192via inverter 202, and its output is connected to an input of OR gate204. The second AND gate has one of its inputs connected to the outputof inverter 202, its other input to the output of OR gate 204, and itsoutput is connected to output terminal 190. The third AND gate 198 hasits two inputs connected to input terminals 188 and 192, and its outputis connected to the set input of flip-flop 200. The reset input offlip-flop 200 is connected to the reset input terminal 190, and its setoutput is connected to another input of OR gate 204.

The logic levels indicated in FIG. 4 are for the condition where analarm signal is applied to input terminal 188, and the field location isnot being monitored. Therefore, the alarm signal applied to inputterminal 188 shOuld not be stored, but should be immediately applied tooutput terminal 190.

Input terminals 188 and 192 will thus be at the one and zero logiclevels, respectively, causing AND gate 194 to apply a logic one to aninput of OR gate 204'due to the inverter 202. The OR gate 204 thusoutputs a logic one to one input of AND gate 196, and since the otherinput of AND gate 196 is also at the logic one level, the logic oneapplied to input terminal 188 is communicated to the output terminal190.

If the field location is being monitored, input terminal 192 will be atthe logic one level, as indicated relative to input terminal 106 ofcontrol circuit 108 in the graph of FIG. 3. AND gate 194 is thusblocked, and AND gate 198 outputs a logic one when the alarm signalappears at its input terminal 188. This sets flip-flop 200, applying alogic one to OR gate 204, and also to one of the input terminals of ANDgate 196. The other input of AND gate 196 remains at the zero logiclevel until the monitoring is completed, at which time input terminal192 returns to the zero logic level and AND gate 196 applies the storedalarm signal to terminal 190.

When the automatic calling unit 94 establishes the communication linkand the'gates 116 shown in FlG. l have transferred their data to theshift register 118, the flip-flop 200 in the second alarm storage means93 may be reset, as well as the flip-flops 67, 69, and 71 in the firstalarm storage means. This reset function may be initiated by the singleoutput pulse 174 from output terminal 112 of control means 108, byconnecting a one shot delay multivibrator 113 between output terminal112 and the reset terminals of flip-flops 200, 67, 69, and 71, as shownin FIGS. 1 and 4.

in summary, there has been disclosed new and improved control apparatusfor environmental data systems ofthe type which continuously monitor andrecord on magnetic tape information relative to one or moreenvironmental sensors, and which also monitor each sensor output over apredetermined period of time, and compare the sensor output with apreset threshold value, in order to determine when safe pollution levelsare exceeded. When a safe pollution level is exceeded, an alarmcondition exists which is stored in first alarm storage means until theend of the time interval, and it then, if the field location is notalready being monitored, automatically activates a communication linkfrom the field location of the sensors to a central control station. Ifthe field location is being monitored, second alarm storage means storesthe alarm signal until the monitoring terminates, and it then initiatesthe communication link to notify the central station of the alarmcondition. When the communication link is established, the controlapparatus outputs the first complete clock pulse, following theestablishment of the communication link, at a first output terminal.This signal is used to load stored data from storage means into a shiftregister. The subsequent clock pulses are directed to a second outputterminal, and used to clock the data from the shift register. Thecontrol apparatus prevents starting the transfer of data on a sliver ofa clock pulse, and is uncomplicated and reliable.

I claim as my invention:

1. An electrical control circuit selectively controlling clock pulseseffective to readout stored digital data, comprising:

clock means continuously providing periodic pulses,

first and second output terminals,

an input terminal for receiving a circuit start signal of apredetermined duration corresponding to the amount of the stored data,means including a first gate and a first flip-flop both being responsiveto the clock pulses and the start signal so as to initially startcircuit operation only during an interval prior to the occurrence of thefirst full clock pulse following the application of said circuit startsignal to said input terminal,

means ineluding'second and third gates and a second flip-flop directingsaid first full clock pulse through said second and third gates to saidfirst output terminal during the initial portion of the start signal,said third gate and second flip-flop cooperating to block subsequentclock pulses from reaching said first output terminal,

and means including a fourth gate and said second flip-flop cooperatingto block said first full clock pulse from reaching the second outputterminal, and thereafter cooperating with said second gate to direct allsubsequent clock pulses to the second output terminal for the remainingportion of the duration of the start signal.

2. The control circuit of claim 1 wherein the first and secondflip-flops are connected to the input terminal such that they are resetand clamped in the absence of a circuit start signal.

3. The control circuit of claim 1 wherein the input terminal isconnected to the first gate and to the second flip-flop, with thefirstgate changing its output to toggle the first flip-flop on the firstspace interval between pe riodic clock pulses following the applicationof a start signal to the input terminal, said first flip-flop beingconnected to the second gate, enabling said second gate when it togglesto pass the first full clock pulse to the first output terminal via thesecond and third gates.

4. The control circuit of claim 3 wherein the third gate is connected tothe second flip-flop such that the clock pulse applied to the firstoutput terminal toggles the second flip-flop upon its termination, withthe toggling of the second flip-flop blocking the third gate andenabling the fourth gate to pass clock pulses from the enabled secondgate.

5. Electrical control apparatus for controlling the transfer and readingout of digital data from a storage means, comprising:

storage means containing digital data,

shift register means,

gate means connected between said storage means and said shift registermeans,

and control means having a first output terminal connected to said gatemeans, a second output terminal connected to said shift register means,an input terminal adapted to receive a start signal for initiating thetransfer of data from the storage means to said shift register means,and the reading out of the data from the shift register means, clockmeans providing periodic pulses, means including a first gate and afirst flip-flop starting the circuit opera tion so as to be initiallyresponsive to only the first full clock pulse following the applicationof a circuit start signal to said input terminal, means including secondand third gates and a second flipflop directing said first full clockpulse through said second and said third gates to said first outputterminal during the initial portion of the start signal, said third gateand second flip-flop cooperating to block subsequent clock pulses fromreaching said first output terminal, and means including a fourth gateand said second flip-flop cooperating to block said first full clockpulse from reaching the second output terminal, and thereaftercooperating with said second gate to direct all subsequent clock pulsesto the second output terminal for the remaining portion of the durationof the start signal.

1. An electrical control circuit selectively controlling clock pulseseffective to readout stored digital data, comprising: clock meanscontinuously providing periodic pulses, first and second outputterminals, an input terminal for receiving a circuit start signal of apredetermined duration corresponding to the amount of the stored data,means including a first gate and a first flip-flop both being responsiveto the clock pulses and the start signal so as to initially startcircuit operation only during an interval prior to the occurrence of thefirst full clock pulse following the application of said circuit startsignal to said input terminal, means including second and third gatesand a second flip-flop directing said first full clock pulse throughsaid second and third gates to said first output terminal during theinitial portion of the start signal, said third gate and second flipflopcooperating to block subsequent clock pulses from reaching said firstoutput terminal, and means including a fourth gate and said secondflip-flop cooperating to block said first full clock pulse from reachingthe second output terminal, and thereafter cooperating with said secondgate to direct all subsequent clock pulses to the second output terminalfor the remaining portion of the duration of the start signal.
 2. Thecontrol circuit of claim 1 wherein the first and second flip-flops areconnected to the input terminal such that they are reset and clamped inthe absence of a circuit start signal.
 3. The control circuit of claim 1wherein the input terminal is connected to the first gate and to thesecond flip-flop, with the first gate changing its output to toggle thefirst flip-flop on the first space interval between periodic clockpulses following the application of a start signal to the inputterminal, said first flip-flop being connected to the second gate,enabling said second gate when it toggles to pass the first full clockpulse to the first output terminal via the second and third gates. 4.The control circuit of claim 3 wherein the third gate is connected tothe second flip-flop such that the clock pulse applied to the firstoutput terminal toggles the second flip-flop upon its termination, withthe toggling of the second flip-flop blocking the third gate andenabling the fourth gate to pass clock pulses from the enabled secondgate.
 5. Electrical control apparatus for controlling the transfer andreading out of digital data from a storage means, comprising: storagemeans containing digital data, shift register means, gate meansconnected between said storage means And said shift register means, andcontrol means having a first output terminal connected to said gatemeans, a second output terminal connected to said shift register means,an input terminal adapted to receive a start signal for initiating thetransfer of data from the storage means to said shift register means,and the reading out of the data from the shift register means, clockmeans providing periodic pulses, means including a first gate and afirst flip-flop starting the circuit operation so as to be initiallyresponsive to only the first full clock pulse following the applicationof a circuit start signal to said input terminal, means including secondand third gates and a second flip-flop directing said first full clockpulse through said second and said third gates to said first outputterminal during the initial portion of the start signal, said third gateand second flip-flop cooperating to block subsequent clock pulses fromreaching said first output terminal, and means including a fourth gateand said second flip-flop cooperating to block said first full clockpulse from reaching the second output terminal, and thereaftercooperating with said second gate to direct all subsequent clock pulsesto the second output terminal for the remaining portion of the durationof the start signal.